From our previous discussion of Nodal Analysis we have seen, how voltage sources affect nodal analysis. We have also seen how a voltage source makes it easier for us to calculate the node voltages when connected with a reference node. But things get complicated when a voltage source cannot be referenced i.e. it comes in between two non-reference node. This voltage source along with two non-reference nodes forms a supernode. 

In summary, When a voltage source comes in between two non-reference node then these two non-reference nodes and the voltage source form a supernode and we take this supernode as a single node and apply KCL and KVL to solve the circuit.

To solve a problem of supernode follow these steps:

Let us explain this procedure with an example:

First of all we have marked a reference node V0. Then we marked all other nodes as we do normally for nodal analysis.

Now we have given a dotted circle to remind us that this is a supernode along with V1 and V2.

Now we apply KCL at the circuit:

2 = (V1 – 0) / 2 + (V2 – 0) / 4 +7

8 = 2 V1 + V2 +28 (multiplying both sides by 4)

2 V1 + V2 = -20 ………………………………………………. (a)

Now we apply KVL at the supernode loop:

-V1 - 2 +V2 = 0

V2 = V1 + 2 ……………………………………………………. (b)

Putting this value of V2 in equation (a):

2 V1 + (V1 + 2) = -20

3 V1 = -22

V1 = -22/3 V

Now from (b): V2 = -22/3 +2 = -16/3V

Note that the 10 Ohm resistor connected across the supernode does not make any difference in the calculations as it is connected across the supernode.

We have already gain understandings of nodes, branches and loops. German physicist Gustav Robert Kirchhoff gave two laws which alongside with Ohm’s laws give us a powerful tool of circuit analysis.

Kirchhoff’s Current Law (KCL):

Kirchhoff stated that, amount of current entering or leaving a node should be equal. That means the algebraic sum of currents with respect to a node should always be zero.

A water pipe analogy would make it easier for us to understand this law. Suppose in a network of water pipes, water comes and leaves through different branches. At a single point of this network the amount of water coming to that node or point from different branch is always equal to the amount of water leaving from that point or node. If we think water as current then the amount of current coming through different branches at a node in a circuit must be equal to the amount of current leaving that node. This is Kirchoff’s Current Law (KCL).

To illustrate KCL look at the figure below:

 

At figure A, current I is entering node X and I1 and I2 is leaving node X. And at node Y, I1 and I2 is entering node Y and I is leaving node Y.

Hence, according to KCL:   

I=I1+I2=I-I1-I2 = 0

Here current I1 and I2 has opposite polarity of I. So we can express it as: I+I1+I2=0

At figure B, same thing happens. Current I1 and I2 are entering node Z and I3, I4 and I5 is leaving node Z.

Hence, according to KCL:

I1+I2+I3+I4+I5=0

Kirchoff’s Voltage Law (KVL):

The statement of KVL is: In a closed path or loop the algebraic sum all voltages must be zero. That means simply, the voltage sources will generate voltages and other elements will consume it. 

We already know the resistors have always a voltage drop, i.e they consume voltage. Other elements like capacitors and inductor also have voltage drops as they consume real or reactive power from the source. 

To illustrate KVL, let us see the figure below,

The voltage source E generates voltage or potential. Whereas Resistors have drops of E1, E2, E3 and E4. According to KVL, 

E = E1 + E2 + E3 +E4

As we can see from the figure, the signs of potential of resistors is opposite of voltage source. So,

E= -E1-E2-E3-E4

E+E1+E2+E3+E4=0

Hence, the algebraic sum of voltages in a loop is zero. 

Nodal analysis is a procedure to analyze circuits. It uses node voltages as circuit variables. It is a very easy procedure for calculation as it reduces equations and makes it convenient to solve large networks. In nodal analysis we don’t take element voltages rather we take node voltages which actually reduces number of equations to be solved simultaneously. Nodal analysis is basically the implementation of KCL (Kirchoff’s Current Law).

We are interested in node voltages in nodal analysis, and after finding out node voltages we form independent circuit equations to solve the circuit. We should follow the steps below to solve a circuit using nodal analysis:

Now let’s explain these three steps using an example. Look at the following circuit.

 

It’s a simple circuit with a voltage source of 10V and a current source of 1 mA and three different resistors. We have to find the voltage across the resistor R3. Now let us assign a reference node first. Here we can see three nodes are there. We choose the lowermost one as the reference node and assign it Vo = 0V. We also define other nodes having voltages as V1 and V2.

 

 

Now as we can see, node V1 has a voltage source of 10V and the other terminal of the source is connected to the reference node. Hence we can say that the whole 10V should appear at V1.

Therefore V1=10V.

Well, here is an important thing to mention: most of the time we assign the node which connected to a voltage source’s negative terminal as a reference node which in turn simplifies our calculation by giving the other node voltage value directly from the voltage source’s value.

 Now, let us apply KCL at node V2:

(V2 – V1) / 20 k  + V2 / 10 k – 1 m = 0

 (V2 – V1) / 20 k  + V2 / 10 k = 1 m

V2 –V1 + 2 V2 = 20  (multiplying both sides by 20k)

3 V2 – V1 = 20

3 V2 – 10 = 20 (putting the value of V1)

3 V2 = 20 + 10

3 V2 = 30

V2 = 30 / 3

V2 = 10V

Now, we have all the node voltages. We can find the voltage Vr3 easily.

Vr3 = V1 – V2 = 10 V – 10 V = 0V

We have taken arbitrary values of resistors and sources which lead the voltage across R3 to be zero.

 Most of the time we can solve the circuit using our idea of series and parallel connection and ohm’s law or KCL or KVL. But sometimes we encounter some circuit where the formations of elements are neither in series nor in parallel. For example look at the figure of bridge network below:

 

Now look at the following two formations which look like Wye and Delta. These formations usually found in three phase connections, filters, or in matching networks.

  

 (a) Y netwrk (b) Delta Network

 (a) Delta Network

 

 (b) Pie Network

When we analyze a circuit we may find a certain formation to be helpful. And we might want to change one formation into other. Suppose it might helpful for us to work with Wye formation in three phase rather in Delta formation. So we have to know how to transform a Delta network into Wye network.

Delta to Wye conversion:

Look at the figure below:

 

Now for Delta to Wye conversion:

R1 = (Rb . Rc) / (Ra + Rb + Rc)

R2 = (Rc . Ra) / (Ra + Rb + Rc)

R3 = (Ra . Rb) / (Ra + Rb + Rc)

We don’t have to memorize these formulas rather we can easily remember these. Each resistor of the Wye network is the product of the two adjacent resistors of Delta network, divided by the sum of all three resistors of the Delta network.

Wye to Delta Conversion:

Look at the figure again:

Now for Wye to Delta conversion:

Ra = (R1.R2 + R2.R3 + R3.R1) / R1

Rb = (R1.R2 + R2.R3 + R3.R1) / R2

Rc = (R1.R2 + R2.R3 + R3.R1) / R3

We don’t have to memorize this also. The easy way to remember is, each resistor in the Delta Network is the sum of all possible product formation of Wye network’s resistors taken two at a time, divided by the opposite Wye resistor.

When we discuss network topology we have to understand certain terms. Among these terms node, branch or loops are used most of the time. Let’s see what they mean.

Branch: A single element with its terminals is usually called a branch. For example a voltage source or a resistor is a branch.

Node: When two or more branches are connected at a point then that point is called a node.

Loop: A closed path in a circuit is called a loop.

Mesh: Mesh is a kind of loop which has no loop inside it. But you have to remember that all meshes are also loops. But all loops are not meshes. 

For example let’s have look at the following figure:

In a network or circuit, number of loop, nodes and branches has to satisfy the following fundamental relationship:

                b=l+n-1

where, b = number of branches,

l = number of loops and

n = number of nodes.

There is another important thing to remember in circuit analysis.